Calling Perl script from Verilog/System-Verilog code - $system method

Anywhere inside a block of the Verilog/System-Verilog code, we can call a Perl script !!!
When verifying a basic clock-tree block (which supplies all clks to a SoC), I came across a PLL from a vendor. It used a complex Perl script to calculate the divider values inside it. These values needed to be fed into its inputs to create proper PLL outputs.

This was the reason I had to call the Perl script inside my System Verilog test class. Now I can randomize my frequencies, calculate the inputs and drive the PLL.

Simple call:

task run_phase(uvm_phase phase);
...
...
$system("dividr_calc.pl");
...
...
endtask

Call with arguments:

task run_phase(uvm_phase phase);
  ...
  ...
  $system($sformatf("dividr_calc.pl %0dMHz", freq));
  ...
  ...
endtask